These registers are accessed using the mtpr and mfpr instructions.

P0BR

0x8 Process Space P0 Base Register (Read / Write)

POBR holds the virtual address of the current processes P0 page table entries. The address must be long aligned (the low 2 bits must be 00) and must be in system space ( address >= 0x80000000 and address < 0xC0000000 ).

P0LR

0x9 Process Space P0 Length Register (Read / Write)

The P0LR contains the size of the current processes P0 page table in long words.

P1BR

0xA Process Space P1 Base Register (Read / Write)

P1BR holds the virtual address of the current processes P1 page table entries. The address must be long aligned (the low 2 bits must be 00) and must have a value between 0x7f80000 and 0xBF000000. This is to ensure the page table entries are always in system space.

P1LR

0xB Process Space P1 Length Register (Read / Write)

The P1LR contains the number of unused page table entries (each PTE is a long word) of the current processes P1 page table.

SBR

0xC System Base Register (Read / Write)

SBR holds the Real address of the system page table entries. The address must be long aligned (the low 2 bits must be 00).

SLR

0xD System Length Register (Read / Write)

The SLR contains the size of the System page table in long words.

MAPEN

0x38 Memory Management Enable (Read / Write)

E = Enable bit (Read / Write)

Setting bit 0 of the MAPEN register enables memory management. MacVAX sets this bit when resetting or loading a program.