ADWC Instruction

Purpose:To perform extended precision addition
Format:opcode add.rl, sum.ml
Operation:sum <- sum + add + C;
Condition
Codes:
N <- sum LSS 0;
Z <- sum EQL 0;
V <- {integer overflow};
C <- {Carry from the most significant bit};
Exceptions:Integer Overflow
Opcodes:
D8ADWCAdd Long with Carry
Description: The sum operand is replaced by the sum of the addend operand, the sum operand and the contents of the C condition code bit. The add operand is unaffected.
Notes:
1.
On overflow, the sum operand is replaced by the low order bits of the true result.
2.
The 2 additions in the operation are performed simultaneously.