BBxxI Instruction

BBxxI Instructions

Purpose:

To branch on bit test and modify under memory interlock

Format:

opcode pos.rl, base.ab, displ.bb

Operation:

teststate = if {BBSSI} then 1 else 0;
newstate = teststate;
{set interlock}
tmp <- FIELD(pos, 1, base)
FIELD(pos, 1, base) <- newstate
{release interlock}
if tmp EQL teststate then: PC <- PC + sign-extended displ

Condition
Codes:

N <- N;
Z <- Z;
V <- V;
C <- C;

Exceptions:

Reserved Operand

Opcodes:

E2	BBSSI	Branch on bit Set and Set Interlocked
E5	BBCCI	Brance on bit Clear and Clear Interlocked

Description:

The single bit specified by the position and base operands is tested. If it is in the test state indicated by the instruction, the sign-extended branch displacement is added to the PC and the PC is replaced by the result. Regardless of the result, the tested bit is put in the new state indicated by the instruction.

If the bit is contained in memory, the reading of the state of the bit and the setting of it to the new state is an interlocked operation. No other processor or I/O device can do an interlocked access on the bit during the interlocked operation.

Notes:

1.: A reserved operand fault occurs if pos is greater (unsigned) than 31 and the bit is contained in a register.
2.: On a reserved operand fault, the condition codes are unpredictable.
3.: Except for memory interlocking, BBSSI is equivalent to BBSS and BBCCI is equivalent to BBCC.