REI Instruction

Purpose:

To return after an interrupt or exception service routine.

Format:

opcode

Operation:

tmp1 <- (SP)+; Pick up saved PC

tmp2 <- (SP)+; Pick up saved PSL

if { tmp2<CMD> LSSU PSL<CMD>}

OR { tmp2<IS> EQLU 1 and PSL<IS> EQLU 0}

OR { tmp2<IS> EQLU 1 and tmp2<CMD> NEQU 0}

OR { tmp2<IS> EQLU 1 and tmp2<IPL> EQLU 0}

OR { tmp2<IPL> GTRU 0 and tmp2<CMD> NEQU 0}

OR { tmp2<PMD> LSSU tmp2<CMD> }

OR { tmp2<IPL> GTRU PSL<IPL> }

OR { tmp2<MBZ> NEQU 0 }

then

reserved operand fault;

if { tmp2<CM> EQLU 1 }

AND{ tmp2<FPD,IS,DV,FU,IV> NEQU 0 }

OR { tmp2<CMD> NEQU 3 }

reserved operand fault;

{disallow interrupts};

if PSL<IS> EQLU1 then

ISP <- SP;

else

PSL<CMD>_SP <- SP

if PSL<TP> EQLU 1 then

tmp2<TP> <- 1;

PC <- tmp1;

PSL <- tmp2;

if PSL<IS> EQLU 0 then

SP <- PSL<CMD>_SP;

If PSL<CMD>> GEQU ASTLVL then: {request interrupt at IPL 2};

{allow interrupts};

Condition
Codes:

N <- saved PSL<N>
Z <- saved PSL<Z>
V <- saved PSL<V>
C <- saved PSL<C>

Exceptions:

Reserved Operand

Opcodes:

REI

Return from Exception or Interrupt

Description:

A longword is popped from the current stack and held in a temorary PC. A second longword is popped from the stack and held in a temporary PSL. Validity of the popped PSL is checked. The current stack pointer is saved and a new stack pointer is selected according to the new PSL current mode and IS fields. The level of the highest priviledge AST is checked against the current mode access to see whether a pending AST can be delivered. Execution resumes with the instruction being executed at the time of the exception or interrupt (ie. the PC is replaced by the temporary PC). Any instruction lookahead in the processor is reinitialized.

Notes:

1.: The exception or interrupt service routine is responsible for restoring any registers saved and removing any parameters from the stack.
2.: As usual for faults, any access violation or translation not valid conditions on the stack pops restore the pointer and fault.
3.: The non-interrupt stack pointers may be fetched and stored by hardware either in internal registers or in their allocated slots in the Process Control Block. Only LDPCTX and SVCPTX always fetch and store in the PCB. MFPR and MTPR always fetch and store the pointers whether in registers or the PCB.